PART |
Description |
Maker |
ACTS74HMSR ACTS74MS 5962F9671301VCC 5962F9671301VX |
ACT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14 Radiation Hardened Dual D Flip Flop with Set and Reset D-Flip Flop, Dual, with Set and Reset, TTL Inputs, Rad-Hard, Advanced Logic, CMOS
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INTERSIL[Intersil Corporation]
|
MC74VHCT574A MC74VHCT74A ON1761 MC74VHCT74AD MC74V |
From old datasheet system Dual D-Type Flip-Flop with Set and Reset OCTAL D-TYPE FLLP-FLOP WITH SET AND RESET
|
ON Semiconductor Motorola
|
MC74VHCT74ADR2 MC74VHCT74ADR2G MC74VHCT74ADTR2 MC7 |
Dual D?Type Flip?Flop with Set and Reset Dual D−Type Flip−Flop with Set and Reset
|
ONSEMI[ON Semiconductor]
|
MC10H106 MC100EL29DWR2 MC10H117 MC10H117FN MC100EP |
Triple 4-3-3-Input NOR Gate 5V ECL Dual Differential Data and Clock D Flip-Flop With Set and Reset Dual 2-Wide 2-3-Input OR-AND/OR-AND-Invert Gate 3.3V / 5V ECL Differential Receiver/Driver with Variable Output Swing 5V ECL 2-Input XOR/XNOR 4-Wide OR-AND/OR-ANDbar Gate 5V ECL 1:2 Differential Fanout Buffer 3.3V / 5V ECL 6-Bit Differential Register with Master Reset 3.3V ECL Triple D-Type Flip-Flop with Set and Reset 3.3V / 5V ECL ÷2 Divider 5V ECL Differential Data and Clock D Flip-Flop
|
ON Semiconductor
|
74HC74N652 |
Dual D-type flip-flop with set and reset; positive edge-trigger
|
NXP Semiconductors
|
ACS74MS |
CMOS Dual D Type Flip Flop with Set and Reset, Advanced Logic
|
Intersil
|
74LV74 74LV74D LV74 74LV74PW 74LV74PWDH 74LV74DB 7 |
DUAL D-TYPE FLIP-FLOP WITH SET AND RESET; POSITIVE-EDGE TRIGGER
|
NXP Semiconductors PHILIPS[Philips Semiconductors]
|
74ALVC74PW 74ALVC74 74ALVC74BQ 74ALVC74D |
Dual D-type flip-flop with set and reset; positive-edge trigger 带设置和复位功能的双D触发器;上升沿触
|
NXP Semiconductors N.V.
|
MC74LVX74 MC74LVX74DT ON1600 MC74LVX74D MC74LVX74M |
From old datasheet system LOW-VOLTAGE CMOS DUAL D-TYPE FLIP-FLOP WITH SET AND CLEAR WITH 5V-TOLERANT INPUTS
|
MOTOROLA[Motorola, Inc] ONSEMI[ON Semiconductor]
|
5962F9863201VCC 5962F9863201V9A 5962F9863201VXC AC |
AC SERIES, DUAL POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDFP16 AC SERIES, DUAL POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16 Radiation Hardened Dual J-K Flip-Flop with Set and Reset 辐射硬化的设置和复位JK触发
|
Intersil Corporation Intersil, Corp.
|
74AUP1G74GD 74AUP1G74GM125 |
Low-power D-type flip-flop with set and reset; positive-edge trigger Low-power D-type flip-flop with set and reset; positive-edge trigger; Package: SOT902-1 (XQFN8U); Container: Reel Pack, Reverse, Reverse
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NXP Semiconductors
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